Electronic devices such as televisions, camcorders, personal digital assistants (PDAs), mobile telephones, computers, etc. play increasingly important roles in our work, family, and recreational lives. These electronic devices are constructed using solid-state components, including multiple integrated circuits (ICs). Each IC typically includes logic elements such as operational elements, memory elements, etc. that are used to internally process data and perform other tasks/functions. Usually, logic elements for each IC are formed on a “die” of silicon or other semiconductor material. The IC is then surrounded by plastic or a similar material to create an IC package. Extending from the IC die through the IC packaging are input/output (I/O) pins that enable communication between the logic elements of the IC and the external world. Multiple ICs that work together in an electronic device are interconnected using one or more busses to which the I/O pins of individual ICs are connected.
Generally, the greater the number and types of features that are provided by an IC, the more I/O pins that are required for providing such features at any given throughput. In other words, the number of I/O pins on an IC limits the number of signals that can be input to or output from the IC at any given instant. It can therefore be beneficial to have many I/O pins for an IC. However, each of these I/O pins occupies a finite amount of “real estate” on the IC packaging. Consequently, for a given IC packaging size, there are a finite number of I/O pins that may be included and, potentially, a limited amount of features that may be provided at a given throughput. In other words, the physical size of an IC can limit its performance to the extent that the corresponding number of I/O pins is limited.
From a pin count perspective, it may therefore appear to be advantageous to increase the size of the IC die and packaging in order to maximize pin count to accommodate all desired features. However, the cost of the IC, especially of the IC die, increases dramatically as the size of the die increases. Also, the ability to construct compact electronic devices is hindered when the size of the overall IC packaging is increased. Hence, there is a conflict between (i) reducing the size and cost of an IC and (ii) adding functionality thereto that is I/O dependent due to pin count limitations. This conflict between pin count demands and performance goals is exacerbated with ICs that employ differential signaling because two I/O pins are usually used to communicate one signal.